FW: 64 bit counters in MPLS MIBs

["Wijnen, Bert (Bert)" <bwijnen@lucent.com>]

I had suggested to MPLS MIB people that at places
where they use parallel 64 and 32 bit counter (the
32-bit values fo those systems that do not support 
64bit), that it might be better to use just 64 bit
and forget the 32 bit counters.

This is what I am getting back. Any opinions/input
or comments?

I understand that we will NOT change the description
of counter64 of course.

Thanks,
Bert 

-----Original Message-----
From: Thomas D. Nadeau [mailto:tnadeau@cisco.com]
Sent: maandag 6 januari 2003 16:11
To: Wijnen, Bert (Bert)
Cc: Joan Cucchiara x302; Cheenu Srinivasan
Subject: 64 bit counters in MPLS MIBs



	I have a question RE: 64 bit counter changes
in the MIBs.  During the MIB review, you (Bert) had
suggested that we delete the counters called
HC and change the type of the existing counters
from 32 bits to 64 bits.   My question is when we
support these on platforms that indeed do not
support 64 bit counters, can we add something
to the description that allows for this? I have been
discussing this change with some developers
here and have been getting serious push back
based on the fact that on platforms that do not
natively support 64 bit counters one must emulate
them at the process level. On the surface this seems
reasonable. However, when you look at the number of
emulated counters in just say the LSR MIB which has
per label counters (there can be 100,000s of labels),
this starts looking very unpalatable very quickly.

	So I think we either need to continue
supporting the 32 bit versions and/or change
the description of Counter64 to allow for a variation.

	--Tom