RE: [RRG] Six/One Router Design Clarifications

["Tony Li" <tony.li@tony.li>]

|On Tue, 29 Jul 2008, Tony Li wrote:
|> For line rate (for interesting values of line rate), you'd 
|need to buffer
|> the fragments in static RAM, but this too can be done today.
|
|The point is, how do you buffer 120 secs (MSL) of 10 Gbit/s (or more) 
|of (possibly massively) out-of-order fragments?  Or if it doesn't 
|support 120 secs, how long could it support?


Fair.  Fractions of a second in on-chip SRAM.  Much more if you tweak the
algorithm to keep control in SRAM and the actual data in DRAM, but still
only on the order of 10GB today.  Still, that should be about 10s.

Tony


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